foto Antonio Jose Serrano Lopez
ANTONIO JOSE SERRANO LOPEZ
PDI Titular d'Universitat
Coordinador/a Curs
antonio.j.serrano@uv.es
http://www.uv.es/ajserran
http://ajserran.blogs.uv.es
Knowledge area: ELECTRONICS
Department: Electronic Engineering
Departamento de Ingeniería Electrónica Escuela Técnica Superior de ingeniería Universitat de València Edificio ETSE, bloque 3 nivel 2 Av. de la Universidad, sn E-46100 Burjassot (Valencia) SPAIN
(9635) 43417
Subjects taught and teaching methods
34819 - Company internships EETPrácticum
34820 - Degree final project in Electronic Engineering for TelecommunicationsWork end of studies
34945 - Company internshipsPrácticum
36414 - Data, science and societyPractices, Theory
44290 - Master's final projectWork end of studies
44649 - Introduction to data scienceTheoretical-Practical
44656 - Machine Learning (II)Theoretical-Practical
44660 - Data science in biomedicineTheoretical-Practical
44662 - External internshipsPrácticum
44663 - Master's final projectWork end of studies
Tutorials
Second semester
Thursday de 09:00 a 12:00. DESPATX 3.2.20
Observations
You participate in the electronic tutoring program of the Universitat de València