Fitxa persona

Juan M. Orduña received the MS in computer engineering from the Technical University of Valencia, Spain, in 1990. He worked at Telefónica de España, Manpel Electrónica, S.A. and at the Technical University of Valencia as a computer engineeer. He received the PhD. in computer engineering from the University of Valencia in 1998. His research has been developed inside the ACCA team (http://www.acca-group.info). Currently, he is a lecturer profesor in the Department of Informatics, at the University of Valencia, SPAIN, where he leads the GREV research group (http://grev.uv.es). He is member of the HiPEAC network of excellence (http://www.hipeac.net/), and his research is currently supported by the Spanish MEC and the European Commission through several projects. Dr. Orduna served as a member of the Program Committee in different conferences and workshops (ICPP, Europar, VR, ICPADS, etc.) as well as a reviewer for scholarly journals like Parallel Computing, IEEE TPDS, JNCA, or FGCS. He has published papers about his research in a number of high impact international journals and conferences.