University of Valencia logo Logo School of Engineering Logo del portal

Renesas Electronic Seminar

  • February 8th, 2018
Renesas Electronic Seminar

On February 14th at 8:30 am at the boardroom (Sala de Juntas 0.2.4) of the ETSE-UV, it will take place the updated seminar of Renesas Electronics about the SYNERGY platform. Conducted in Spanish by RENESAS and SILICA staff, it will follow the next schedule:

  • 8:30   (1h)           Welcome, introduction
  • 9:00   (30’)          Presentation of the Synergy Family
  • 9:30   (30’)          Introductory video about the development environment of E2Studio
  • 9:45   (15)           Avnet Visible Things IIoT Kit
  • 10:00 (1h)           LAB1 – Build an Application in 30 minutes
  • 11:00  (30’)         Break
  • 11:30 (2h)           LAB2 –WIFI Framework & GUI Workshop
  • 13:30 (1h)           Lunch
  • 14:30 (15’)          Renesas-Synergy-Software-SSP-v1.3.0-Wi-Fi-Frameworks
  • 15:00                   Farewell

 

 

SYNERGY is formed by:

·         4 available families of MCUs (CORTEX M0+ y M4)

·          SW, HW and Kits tools

·         MIDDLEWARE, Frameworks y Stacks (Ethernet, USB, CAN, Wi-Fi, BLE, Modem Celular Communications)

·          HAL, API y Graphic libraries 

·         All the above is managed by a first-class RTOS (ThreadX, used in more than 2,000 million of devices)

·         Also including SUPPORT and periodical UPDATES validated by RENESAS from its portal Gallery (https://synergygallery.renesas.com/auth/login ). 

 

It is an advantaging and innovative proposal regarding the best microcontrollers and software currently present in the market, since Synergy licenses are available for free downloading and you only need to get registered. Besides, to make it even better, you can get the excellent IAR compiler for ARM architecture for free to use it in SYNERGY.

If you are interested in attending this seminar, send an email to jose.torres@uv.es. Limited places.